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The following archive was created by hippie-mail 7.98617-22 on Sat Apr 10 1999 - 01:17:37
Dutra de Lacerda (dulac@ip.pt)
Sat, 12 Dec 1998 04:33:43 +0000
At Friday, you wrote:
>You wrote:
>> I assume that a hand optimized ASM implementation for AMD K6 will
>> run faster than a similar P-II implementation. The reason? Simply
>> because the K6 is more efficient in Operations/Clock ... specially
>> working with integers where the lack of the L2 is not relevant.
>
>Only if you can keep everything in registers. The 512K clk/2 L2 cache
>on a PII will easily trounce a K6 if you have to go out to memory a
>lot. The PPro is even better at this, and the K6-3 will beat them all
>early next year.
>
Not quite...
K6 has 2x32k L1 caches (one for code and one for data) while Pentiums
have only 2x16k L1 caches... Thus one of the reasons for the traditional
superiority, working on integers, by Cyrix and AMD...
So when you have to much registers you simply do give a try to L1-Data
instead of pushing and poping, or other tricks directed to Intel CPUs
(Compilers with code given by Intel). You just use the L1 Data cache
and get those values FAST.
Also very informative is a different and small article named:
"Thoughts on the K6-2 400Mhz & Winstone 99"
at http://cpu.simplenet.com/news.htm
About K6-3 (Sharptooth) agree completely with you;
If K6-2 has similar performance with no L2...
...Then it will be a lot faster than P-II, at same frequency.
(I would like to have one!)
Regards,
D.L.
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Antonio Manuel Melo de Carvalho Dutra de Lacerda
Morada : Rua Rodrigues Cabrilho, 5 - 5 Esq.
1400 Lisboa, PORTUGAL
Telefone : +351-(1)-3013579
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The following archive was created by hippie-mail 7.98617-22 on Sat Apr 10 1999 - 01:17:37