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The following archive was created by hippie-mail 7.98617-22 on Sat Apr 10 1999 - 01:14:01
Eric Young (eay@cryptsoft.com)
Wed, 23 Sep 1998 14:13:31 +1000 (EST)
As part of reworking my Bignum library, I've been having to redo some of my
assember. The question I have relates to the normal sparc register usage
conventions under Solaris (and SunOS if possible).
My understanding is that
%i0-%i7
%l0-%l7
%o0-%o7
are reasonably simple, watch out for the stack pointer, frame
pointer and return address.
My question is about the global registers. The only references is that
%g1 is normally a temp and
%g2-%g4 can also be used, but some old programs may have problems.
This leaves me wondering what %g5, %g6 and %g7 are used for.
Are the global registers preserved across function calls?
Am I free to mutilate the input registers?, I assume yes.
My final question concerns the Sparc v9 chips. Rumour had it that solaris
does save the local registers as 64 bit quantities on context switches.
Is this true? Are any of the others saved as 64 bit number in the 32bit
Solaris OS?
Any responses would be greatly appreciated.
Sun may finally be lifting their game with online documentation, but they are
still behind DEC, Intel, SGI, HP and IBM. This sort of information was easy
to find in the documentation for the CPUs from those vendors....
Oh, on a more obscure point, does anyone know if the ARM/StrongARM 64+=32*32
instruction does actually set the overflow bit. The documentation claims it
does not, but it makes progamming sense for the overflow to be set.
eric (who needs about 20+ temp registers to implement comba8 type
multiplication cleanly)
The following archive was created by hippie-mail 7.98617-22 on Sat Apr 10 1999 - 01:14:01